Cypress Semiconductor /psoc63 /FLASHC /FLASH_CTL

FLASH macro main interface wait states: ‘0’: 0 wait states. … ‘15’: 15 wait states

Specifies remapping of FLASH macro main region. ‘0’: No remapping. ‘1’: Remapping. The highest address bit of the FLASH main region is inverted. This effectively remaps the location of FLASH main region physical sectors in the logical address space. In other words, the higher half physical sectors are swapped with the lower half physical sectors.

Note: remapping only affects reading of the FLASH main region (over the R interface). It does NOT affect programming/erasing of the FLASH memory region (over the C interface).

E.g., for a 512 KB / 4 Mb main region, the logical address space ranges from [0x1000:0000, 0x1007:ffff] (the highest bit if the FLASH main region is bit 18). The memory has four physical sectors: sectors 0, 1, 2 and 3. If REMAP is ‘0’, the physical regions logical addresses are as follows:

• The physical region 0: [0x1000:0000, 0x1001:ffff].
• The physical region 1: [0x1002:0000, 0x1003:ffff].
• The physical region 2: [0x1004:0000, 0x1005:ffff].
• The physical region 3: [0x1006:0000, 0x1007:ffff]. If REMAP is ‘1’, the physical regions logical addresses are as follows:
• The physical region 0: [0x1004:0000, 0x1005:ffff].
• The physical region 1: [0x1006:0000, 0x1007:ffff].
• The physical region 2: [0x1000:0000, 0x1001:ffff].
• The physical region 3: [0x1002:0000, 0x1003:ffff].

Note: when the REMAP is changed, SW should invalidate the caches and buffers.